NXP Semiconductors /MIMXRT1011 /FLEXSPI /FLSHCR1A2

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Interpret as FLSHCR1A2

31 2827 2423 2019 1615 1211 87 43 0 0 0 0 0 0 0 0 00 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0TCSS0TCSH0 (WA)WA 0CAS0 (CSINTERVALUNIT_0)CSINTERVALUNIT 0CSINTERVAL

CSINTERVALUNIT=CSINTERVALUNIT_0

Description

Flash Control Register 1

Fields

TCSS

Serial Flash CS setup time.

TCSH

Serial Flash CS Hold time.

WA

Word Addressable.

CAS

Column Address Size.

CSINTERVALUNIT

CS interval unit

0 (CSINTERVALUNIT_0): The CS interval unit is 1 serial clock cycle

1 (CSINTERVALUNIT_1): The CS interval unit is 256 serial clock cycle

CSINTERVAL

This field is used to set the minimum interval between flash device Chip selection deassertion and flash device Chip selection assertion. If external flash has a limitation on the interval between command sequences, this field should be set accordingly. If there is no limitation, set this field with value 0x0.

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